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Application of Universal Verification Methodology (UVM) on functional verification of OTG-enabled USB2.0 subsystem

Faraday is a leading fabless ASIC and silicon IP vendor in Asia. The company’s main specialization is design and development of SoC systems. The system functional verification (SFV) team at Faraday is in charge of verifying the RTL designs of such SoCs, ensuring their functional correctness and performance with respect to the design specifications. Communication subsystems are vital in modern SoCs as they enable connections with off-chip devices and allow functionality expansion or data transfer. The Universal Serial Bus (USB) has been the industry’s proven general-purpose interface that is both reliable and versatile.

The most recent project that Faraday is working on is the OTG-enabled USB2.0 subsystem, and the team is assigned to work on the functional verification of the subsystem design. The ultimate goal of the project is to construct and apply a UVM-based verification environment to verify Faraday’s USB2.0 subsystem functions in both Host mode and Device mode. The test sequences are generated to cover four types of USB transfer in each mode: Bulk, Control, Interrupt, and Isochronous. Each transfer will be verified in all USB2.0 supported speed, including Low Speed (LS – 1.5Mbps), Full Speed (FS – 12 Mbps), and High Speed (HS – 480Mbps). When test coverage reaches 100%, the team ascertains all test cases have passed and the correctness of the USB2.0 subsystem has been verified, thus the module can be handed off to the next stage of the development process. Moreover, UVM is known for its modularity and reusability of the verification components for different designs; hence, similar subsystems like USB3.0 can be verified by reusing and extending this UVM verification environment.

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